Apparatus and method of static timing analysis con

专利名称：Apparatus and method of static timing

analysis considering the within-die and die-to-die process variation

发明人：Akio Hirata申请号：US11723580申请日：20070321

公开号：US20070226671A1公开日：20070927

专利附图：

摘要：In a method and apparatus for designing semiconductor integrated circuit, apath delay information producing section produces path delay information by

performing a static timing analysis based on delay information of a cell and subject circuitinformation. A correction table producing section calculates circuit-dependent delayvariation for each combination of circuit parameter values based on variation informationof an element, and stores the calculated circuit-dependent delay variation in a delaycorrection table. A statistical path delay producing section calculates the circuitparameters for a path based on the subject circuit information and the path delayinformation, obtains the corresponding circuit-dependent delay variation based on thecircuit-dependent delay variation correction table, and calculates and outputs statisticalpath delay information based on the circuit-dependent delay variation and thecorresponding path delay information. Thus, it is possible to obtain a value close to anactual path delay worst value with only a little addition of calculation time.

申请人：Akio Hirata

地址：Kyoto JP

国籍：JP

更多信息请下载全文后查看